publications

2023

2022

1. Functional polymeric passivation-led improvement of bias stress with long-term durability of edge-rich nanoporous MoS2 thin-film transistors

   Heekyeong Park, Junhwan Choi, Junoh Shim, and 6 more authors

   2022
2. A Multiple?State Ion Synaptic Transistor Applicable to Abnormal Car Detection with Transfer Learning

   Ji-Man Yu, Gyeongdo Ham, Chungryeol Lee, and 9 more authors

   2022
3. A modulus-engineered multi-layer polymer film with mechanical robustness for the application to highly deformable substrate platform in stretchable electronics

   Youson Kim, Junmo Kim, Chan Young Kim, and 8 more authors

   2022
4. Vertically stacked, low-voltage organic ternary logic circuits including nonvolatile floating-gate memory transistors

   J. Choi, C. Lee, C. Lee, and 5 more authors

   2022

   Choi, Junhwan Lee, Changhyeon Lee, Chungryeol Park, Hongkeun Lee, Seung Min Kim, Chang-Hyun Yoo, Hocheon Im, Sung Gap eng 2020R1A2C1101647/National Research Foundation of Korea (NRF)/ 2021R1A2B5B03001416/National Research Foundation of Korea (NRF)/ 2016R1A5A1009926/Korea Advanced Institute of Science and Technology | KAIST Wearable Platform Material Technology Center (Wearable Platform Materials Technology Center)/ England 2022/04/29 Nat Commun. 2022 Apr 28;13(1):2305. doi: 10.1038/s41467-022-29756-w.

   Abs

   Multi-valued logic (MVL) circuits based on heterojunction transistor (HTR) have emerged as an effective strategy for high-density information processing without increasing the circuit complexity. Herein, an organic ternary logic inverter (T-inverter) is demonstrated, where a nonvolatile floating-gate flash memory is employed to control the channel conductance systematically, thus realizing the stabilized T-inverter operation. The 3-dimensional (3D) T-inverter is fabricated in a vertically stacked form based on all-dry processes, which enables the high-density integration with high device uniformity. In the flash memory, ultrathin polymer dielectrics are utilized to reduce the programming/erasing voltage as well as operating voltage. With the optimum programming state, the 3D T-inverter fulfills all the important requirements such as full-swing operation, optimum intermediate logic value ( V(DD)/2), high DC gain exceeding 20 V/V as well as low-voltage operation (< 5 V). The organic flash memory exhibits long retention characteristics (current change less than 10% after 10(4 )s), leading to the long-term stability of the 3D T-inverter. We believe the 3D T-inverter employing flash memory developed in this study can provide a useful insight to achieve high-performance MVL circuits.

5. Highly Reliable Synaptic Cell Array Based on Organic?Inorganic Hybrid Bilayer Stack toward Precise Offline Learning

   Jun-Hwe Cha, Byung Chul Jang, Jungyeop Oh, and 5 more authors

   2022
6. Memristor?Based Security Primitives Robust to Malicious Attacks for Highly Secure Neuromorphic Systems

   Jungyeop Oh, Sungkyu Kim, Junhwan Choi, and 4 more authors

   2022
7. A Sub-20 nm Organic/Inorganic Hybrid Dielectric for Ultralow-Power Organic Thin-Film Transistor (OTFT) With Enhanced Operational Stability

   J. Choi, C. Lee, J. Kang, and 5 more authors

   2022

   Choi, Junhwan Lee, Chungryeol Kang, Juyeon Lee, Changhyeon Lee, Seung Min Oh, Jungyeop Choi, Sung-Yool Im, Sung Gap eng NRF-2022R1A5A6000846/KAIST Wearable Platform Material Technology Center/ 2021R1A2B5B03001416/National Research Foundation of Korea/ 2021R1A6A3A14038580/National Research Foundation of Korea/ Germany 2022/08/27 Small. 2022 Sep;18(39):e2203165. doi: 10.1002/smll.202203165. Epub 2022 Aug 26.

   Abs

   Organic/inorganic hybrid materials are utilized extensively as gate dielectric layers in organic thin-film transistors (OTFTs). However, inherently low dielectric constant of organic materials and lack of a reliable deposition process for organic layers hamper the broad application of hybrid dielectric materials. Here, a universal strategy to synthesize high-k hybrid dielectric materials by incorporating a high-k polymer layer on top of various inorganic layers generated by different fabrication methods, including AlO(x) and HfO(x) , is presented. Those hybrid dielectrics commonly exhibit high capacitance (>300 nF.cm(-2) ) as well as excellent insulating properties. A vapor-phase deposition method is employed for precise control of the polymer film thickness. The ultralow-voltage (<3 V) OTFTs are demonstrated based on the hybrid dielectric layer with 100% yield and uniform electrical characteristics. Moreover, the exceptionally high stability of OTFTs for long-term operation (current change less than 5% even under 30 h of voltage stress at 2.0 MV.cm(-1) ) is achieved. The hybrid dielectric is fully compatible with various substrates, which allows for the demonstration of intrinsically flexible OTFTs on the plastic substrate. It is believed that this approach for fabricating hybrid dielectrics by introducing the high-k organic material can be a promising strategy for future low-power, flexible electronics.

8. Tunable and Reconfigurable Logic Gates With Electrolyte-Gated Transistor Array Co-Integrated With Neuromorphic Synapses

   Ji-Man Yu, Chungryeol Lee, Joon-Kyu Han, and 4 more authors

   2022

2021

1. Hybrid Gate Dielectric of MoS 2 Transistors for Enhanced Photo?Electronic Stability

   Hamin Park, Dong Sik Oh, Woonggi Hong, and 6 more authors

   2021
2. Multi-functional logic circuits composed of ultra-thin electrolyte-gated transistors with wafer-scale integration

   Ji-Man Yu, Chungryeol Lee, Joon-Kyu Han, and 4 more authors

   2021
3. Hf? and Ti?Based Organic/Inorganic Hybrid Dielectrics Synthesized via Chemical Vapor Phase for Advanced Gate Stack in Flexible Electronic Devices

   Min Ju Kim, Changhyeon Lee, Jaejoong Jeong, and 6 more authors

   2021
4. Systematic Control of Negative Transconductance in Organic Heterojunction Transistor for High-Performance, Low-Power Flexible Ternary Logic Circuits

   C. Lee, J. Choi, H. Park, and 4 more authors

   2021

   Lee, Chungryeol Choi, Junhwan Park, Hongkeun Lee, Changhyeon Kim, Chang-Hyun Yoo, Hocheon Im, Sung Gap eng Research Support, Non-U.S. Gov’t Germany 2021/10/13 Small. 2021 Nov;17(46):e2103365. doi: 10.1002/smll.202103365. Epub 2021 Oct 11.

   Abs

   Organic multi-valued logic (MVL) circuits can substantially improve the data processing efficiency in highly advanced wearable electronics. Organic ternary logic circuits can be implemented by utilizing the negative transconductance (NTC) of heterojunction transistors (H-TRs). To achieve high-performance organic ternary logic circuits, the range of NTC in H-TRs must be optimized in advance to ensure the well-defined intermediate logic state in ternary logic inverters (T-inverters). Herein, a simple and efficient strategy, which enables the systematic control of the range and position of NTC in H-TRs is presented. Each thickness of p-/n-type semiconductor in H-TRs is adjusted to control the channel conductivity. Furthermore, asymmetric source/drain (S/D) electrode structure is newly developed for H-TRs, which can adjust the amount of hole and electron injection, independently. Based on the semiconductor thickness variation and asymmetric S/D electrodes, the T-inverter exhibits full-swing operation with three distinguishable logic states, resulting in unprecedentedly high static noise margin ( approximately 48% of the ideal value). Moreover, a flexible T-inverter with an ultrathin polymer dielectric is demonstrated, whose operating voltage is less than 8 V. The proposed strategy is fully compatible with the conventional integrated circuit design, which is highly desirable for broad applicability and scalability for various types of T-inverter production.

5. Performance enhancement of p-type organic thin-film transistors by surface modification of hybrid dielectrics

   Min Ju Kim, Tae In Lee, Changhyeon Lee, and 6 more authors

   2021
6. All?Solid?State Ion Synaptic Transistor for Wafer?Scale Integration with Electrolyte of a Nanoscale Thickness

   Ji?Man Yu, Chungryeol Lee, Da?Jin Kim, and 8 more authors

   2021
7. Highly Reliable Charge Trap?Type Organic Non?Volatile Memory Device Using Advanced Band?Engineered Organic?Inorganic Hybrid Dielectric Stacks

   Min Ju Kim, Changhyeon Lee, Eui Joong Shin, and 7 more authors

   2021

2020

1. Multi-Stage Organic Logic Circuits Using Via-Hole-Less Metal Interconnects

   Hongkeun Park, Hocheon Yoo, Chungryeol Lee, and 2 more authors

   2020
2. Heavily Crosslinked, High? k Ultrathin Polymer Dielectrics for Flexible, Low?Power Organic Thin?Film Transistors (OTFTs)

   Junhwan Choi, Juyeon Kang, Changhyeon Lee, and 2 more authors

   2020
3. Long?Term Retention of Low?Power, Nonvolatile Organic Transistor Memory Based on Ultrathin, Trilayered Dielectric Containing Charge Trapping Functionality

   Changhyeon Lee, Kwanyong Pak, Junhwan Choi, and 3 more authors

   2020

2019

1. Highly stacked 3D organic integrated circuits with via-hole-less multilevel metal interconnects

   H. Yoo, H. Park, S. Yoo, and 4 more authors

   2019

   Yoo, Hocheon Park, Hongkeun Yoo, Seunghyun On, Sungmin Seong, Hyejeong Im, Sung Gap Kim, Jae-Joon eng IITP-2018-2011-1-00783/Ministry of Science, ICT and Future Planning (MSIP)/International CASE-2017M3A6A5052509/Ministry of Science, ICT and Future Planning (MSIP)/International NRF-2017R1A2B4006749/National Research Foundation of Korea (NRF)/International NRF-2017R1A2B3007806/National Research Foundation of Korea (NRF)/International Research Support, Non-U.S. Gov’t England 2019/06/05 Nat Commun. 2019 Jun 3;10(1):2424. doi: 10.1038/s41467-019-10412-9.

   Abs

   Multilevel metal interconnects are crucial for the development of large-scale organic integrated circuits. In particular, three-dimensional integrated circuits require a large number of vertical interconnects between layers. Here, we present a novel multilevel metal interconnect scheme that involves solvent-free patterning of insulator layers to form an interconnecting area that ensures a reliable electrical connection between two metals in different layers. Using a highly reliable interconnect method, the highest stacked organic transistors to date, a three-dimensional organic integrated circuits consisting of 5 transistors and 20 metal layers, is successfully fabricated in a solvent-free manner. All transistors exhibit outstanding device characteristics, including a high on/off current ratio of  10(7), no hysteresis behavior, and excellent device-to-device uniformity. We also demonstrate two vertically-stacked complementary inverter circuits that use transistors on 4 different floors. All circuits show superb inverter characteristics with a 100% output voltage swing and gain up to 35 V per V.

2. Low?Power, Flexible Nonvolatile Organic Transistor Memory Based on an Ultrathin Bilayer Dielectric Stack

   Kwanyong Pak, Junhwan Choi, Changhyeon Lee, and 1 more author

   2019
3. A study of the charge distribution and output characteristics of an ultra-thin tribo-dielectric layer

   Daewon Kim, Weon-Guk Kim, Ik Kyeong Jin, and 3 more authors

   2019
4. Large?Scale, Low?Power Nonvolatile Memory Based on Few?Layer MoS 2 and Ultrathin Polymer Dielectrics

   Sang Cheol Yang, Junhwan Choi, Byung Chul Jang, and 5 more authors

   2019
5. Polymer Analog Memristive Synapse with Atomic-Scale Conductive Filament for Flexible Neuromorphic Computing System

   B. C. Jang, S. Kim, S. Y. Yang, and 7 more authors

   2019

   Jang, Byung Chul Kim, Sungkyu Yang, Sang Yoon Park, Jihun Cha, Jun-Hwe Oh, Jungyeop Choi, Junhwan Im, Sung Gap Dravid, Vinayak P Choi, Sung-Yool eng Research Support, Non-U.S. Gov’t 2019/01/05 Nano Lett. 2019 Feb 13;19(2):839-849. doi: 10.1021/acs.nanolett.8b04023. Epub 2019 Jan 9.

   Abs

   With the advent of artificial intelligence (AI), memristors have received significant interest as a synaptic building block for neuromorphic systems, where each synaptic memristor should operate in an analog fashion, exhibiting multilevel accessible conductance states. Here, we demonstrate that the transition of the operation mode in poly(1,3,5-trivinyl-1,3,5-trimethyl cyclotrisiloxane) (pV3D3)-based flexible memristor from conventional binary to synaptic analog switching can be achieved simply by reducing the size of the formed filament. With the quantized conductance states observed in the flexible pV3D3 memristor, analog potentiation and depression characteristics of the memristive synapse are obtained through the growth of atomically thin Cu filament and lateral dissolution of the filament via dominant electric field effect, respectively. The face classification capability of our memristor is evaluated via simulation using an artificial neural network consisting of pV3D3 memristor synapses. These results will encourage the development of soft neuromorphic intelligent systems.

6. Ultrathin ZrO(x)-Organic Hybrid Dielectric (EOT 3.2 nm) via Initiated Chemical Vapor Deposition for High-Performance Flexible Electronics

   M. J. Kim, K. Pak, J. Choi, and 4 more authors

   2019

   Kim, Min Ju Pak, Kwanyong Choi, Junhwan Lee, Tae In Hwang, Wan Sik Im, Sung Gap Cho, Byung Jin eng 2019/11/15 ACS Appl Mater Interfaces. 2019 Nov 27;11(47):44513-44520. doi: 10.1021/acsami.9b15363. Epub 2019 Nov 14.

   Abs

   A one-step synthesis method is introduced and used to form an ultrathin, homogeneous organic-inorganic hybrid dielectric film with a high dielectric constant (high-k), based on initiated chemical vapor deposition. The hybrid dielectric is synthesized from tetrakis-dimethyl-amino-zirconium and 2-hydroxyethyl methacrylate, which are a high-k inorganic material and a soft organic material, respectively. A detailed material analysis on the synthesized ZrO(x)-organic hybrid (Zr-hybrid) is performed. The Zr-hybrid dielectric has a high dielectric constant of nine, leading to a film equivalent oxide thickness (EOT) as low as 3.2 nm, which is the lowest EOT obtained from a flexible dielectric layer to date. The leakage current density (J) is no larger than 6 x 10(-7) A/cm(2) at 2 MV/cm, and the breakdown field (E(break)) was approximately 3.3 MV/cm. The J of the Zr-hybrid dielectric remains almost constant even under the 2.5% strain condition, while that of the ZrO(2) dielectric breaks down electrically at a tensile strain of less than 1.0%. The Zr-hybrid dielectric shows an energy band gap in the range of 5.2-5.4 eV and exhibits a sufficient valence band offset of around 3.0 eV with a pentacene organic semiconductor. The gate stack of the Zr-hybrid dielectric/pentacene semiconductor shows decent metal-oxide-semiconductor field-effect transistor performance even under a tensile strain of 1.67%, indicating that the Zr-hybrid is a promising gate dielectric for advanced flexible electronic applications.

2018

1. A High-Performance Top-Gated Graphene Field-Effect Transistor with Excellent Flexibility Enabled by an iCVD Copolymer Gate Dielectric

   J. G. Oh, K. Pak, C. S. Kim, and 4 more authors

   2018

   Oh, Joong Gun Pak, Kwanyong Kim, Choong Sun Bong, Jae Hoon Hwang, Wan Sik Im, Sung Gap Cho, Byung Jin eng Research Support, Non-U.S. Gov’t Germany 2017/12/19 Small. 2018 Mar;14(9). doi: 10.1002/smll.201703035. Epub 2017 Dec 18.

   Abs

   A high-performance top-gated graphene field-effect transistor (FET) with excellent mechanical flexibility is demonstrated by implementing a surface-energy-engineered copolymer gate dielectric via a solvent-free process called initiated chemical vapor deposition. The ultrathin, flexible copolymer dielectric is synthesized from two monomers composed of 1,3,5-trimethyl-1,3,5-trivinyl cyclotrisiloxane and 1-vinylimidazole (VIDZ). The copolymer dielectric enables the graphene device to exhibit excellent dielectric performance and substantially enhanced mechanical flexibility. The p-doping level of the graphene can be tuned by varying the polar VIDZ fraction in the copolymer dielectric, and the Dirac voltage (V(Dirac) ) of the graphene FET can thus be systematically controlled. In particular, the V(Dirac) approaches neutrality with higher VIDZ concentrations in the copolymer dielectric, which minimizes the carrier scattering and thereby improves the charge transport of the graphene device. As a result, the graphene FET with 20 nm thick copolymer dielectrics exhibits field-effect hole and electron mobility values of over 7200 and 3800 cm(2) V(-1) s(-1) , respectively, at room temperature. These electrical characteristics remain unchanged even at the 1 mm bending radius, corresponding to a tensile strain of 1.28%. The formed gate stack with the copolymer gate dielectric is further investigated for high-frequency flexible device applications.

2. Novel Vapor-Phase Synthesis of Flexible, Homogeneous Organic-Inorganic Hybrid Gate Dielectric with sub 5 nm Equivalent Oxide Thickness

   M. J. Kim, K. Pak, W. S. Hwang, and 2 more authors

   2018

   Kim, Min Ju Pak, Kwanyong Hwang, Wan Sik Im, Sung Gap Cho, Byung Jin eng 2018/09/20 ACS Appl Mater Interfaces. 2018 Oct 31;10(43):37326-37334. doi: 10.1021/acsami.8b12716. Epub 2018 Sep 28.

   Abs

   Organic-inorganic hybrid dielectrics have attracted considerable attention for improving both the dielectric constant ( k) and mechanical flexibility of the gate dielectric layer for emerging flexible and wearable electronics. However, conventional solution-based hybrid materials, such as nanocomposite and self-assembled nanodielectrics, have limitations in the dielectric quality when the thickness is deep-scaled, which is critical to realizing high-performance flexible devices. This study proposes a novel vapor-phase synthesis method to form an ultrathin, homogeneous, high- k organic-inorganic hybrid dielectric. A series of hybrid dielectrics is synthesized via initiated chemical vapor deposition (iCVD) in a one-step manner, where 2-hydroxyethyl methacrylate and trimethylaluminum are used as the monomer and inorganic precursor, respectively. The thickness and composition are effectively controlled to form a uniform, defect-free hybrid dielectric. As a result, the synthesized hybrid dielectric has a high- k value as high as 7 and exhibits a low leakage current density of less than 3 x 10(-7) A/cm(2) at 2 MV/cm, even with an equivalent oxide thickness of less than 5 nm. Furthermore, the dielectric layer shows exceptional chemical stability without any degradation in its dielectric performance and a smooth surface morphology. The dielectric layer also has good flexibility, maintaining its excellent dielectric performance under a tensile strain of up to 2.6%. Organic thin-film transistors with the developed hybrid dielectric as the gate dielectric achieved hysteresis-free transfer characteristics, with an operating voltage of up to 4 V and excellent mechanical flexibility as well. The hybrid dielectric synthesized via the iCVD process is a promising candidate for high-performance, low-power flexible electronics.

3. Stretchable active matrix of oxide thin-film transistors with monolithic liquid metal interconnects

   Chan Woo Park, Jae Bon Koo, Chi-Sun Hwang, and 3 more authors

   2018
4. High-performance thin H:SiON OLED encapsulation layer deposited by PECVD at low temperature

   K. W. Park, S. Lee, H. Lee, and 4 more authors

   2018

   Park, Kyoung Woo Lee, Seunghee Lee, Hyunkoo Cho, Yong-Hwan Park, Yong Cheon Im, Sung Gap Ko Park, Sang-Hee eng England 2018/12/20 RSC Adv. 2018 Dec 20;9(1):58-64. doi: 10.1039/c8ra08449a. eCollection 2018 Dec 19.

   Abs

   Highly moisture permeation resistive and transparent single layer thin films for the encapsulation of hydrogenated silicon oxynitrides (H:SiON) were deposited by plasma-enhanced chemical vapor deposition (PECVD) using silane (SiH(4)), nitrous oxide (N(2)O), ammonia (NH(3)), and hydrogen (H(2)) at 100 degrees C for applications to a top-emission organic light-emitting diode (TEOLED). Addition of H(2) into the PECVD process of SiON film deposition afforded the hydrogenated SiON film, which showed not only improved optical properties such as transmittance and reflectance but also better barrier property to water permeation than PECVD SiON and even SiN (x) . The H:SiON film with thickness of only 80 nm exhibited water vapor transmission rate (WVTR) lower than 5 x 10(-5) g per m(2) per day in the test conditions of 38 degrees C and 100% humidity, where this WVTR is the measurement limit of the MOCON equipment. An additional coating of UV curable polymer enabled the H:SiON films to be flexible and to have very stable barrier property lower than 5 x 10(-5) g per m(2) per day even after a number of 10k times bending tests at a curvature radius of 1R. The mild H:SiON film process improved the electrical properties of top-emission OLEDs without generating any dark spots. Furthermore, single H:SiON films having high water vapor barrier could maintain the original illumination features of TEOLED longer than 720 hours. These excellent properties of the H:SiON thin films originated from the structural changes of the SiON material by the introduction of hydrogen.

5. Initiated Chemical Vapor Deposition: A Versatile Tool for Various Device Applications

   Seung Jung Yu, Kwanyong Pak, Moo Jin Kwak, and 13 more authors

   2018
6. Memristive Logic-in-Memory Integrated Circuits for Energy-Efficient Flexible Electronics

   Byung Chul Jang, Yunyong Nam, Beom Jun Koo, and 4 more authors

   2018

2017

1. Vapor-phase synthesis of sub-15 nm hybrid gate dielectrics for organic thin film transistors

   Hyejeong Seong, Junhwan Choi, Bong Jun Kim, and 2 more authors

   2017
2. Surface-Localized Sealing of Porous Ultralow-k Dielectric Films with Ultrathin (<2 nm) Polymer Coating

   S. J. Yoon, K. Pak, T. Nam, and 4 more authors

   2017

   Yoon, Seong Jun Pak, Kwanyong Nam, Taewook Yoon, Alexander Kim, Hyungjun Im, Sung Gap Cho, Byung Jin eng Research Support, Non-U.S. Gov’t 2017/07/21 ACS Nano. 2017 Aug 22;11(8):7841-7847. doi: 10.1021/acsnano.7b01998. Epub 2017 Jul 25.

   Abs

   Semiconductor integrated circuit chip industries have been striving to introduce porous ultralow-k (ULK) dielectrics into the multilevel interconnection process in order to improve their chip operation speed by reducing capacitance along the signal path. To date, however, highly porous ULK dielectrics (porosity >40%, dielectric constant (k) <2.4) have not been successfully adopted in real devices because the porous nature causes many serious problems, including noncontinuous barrier deposition, penetration of the barrier metal, and reliability issues. Here, a method that allows porous ULK dielectrics to be successfully used with a multilevel interconnection scheme is presented. The surface of the porous ULK dielectric film (k = 2.0, porosity approximately 47%) could be completely sealed by a thin (<2 nm) polymer deposited by a multistep initiated chemical vapor deposition (iCVD) process. Using the iCVD process, a thin pore-sealing layer was localized only to the surface of the porous ULK dielectric film, which could minimize the increase of k; the final effective k was less than 2.2, and the penetration of metal barrier precursors into the dielectric film was completely blocked. The pore-sealed ULK dielectric film also exhibited excellent long-term reliability comparable to a dense low-k dielectric film.

3. Low-Power Nonvolatile Charge Storage Memory Based on MoS2 and an Ultrathin Polymer Tunneling Dielectric

   Myung Hun Woo, Byung Chul Jang, Junhwan Choi, and 5 more authors

   2017
4. Organic flash memory on various flexible substrates for foldable and disposable electronics

   S. Lee, H. Seong, S. G. Im, and 2 more authors

   2017

   Lee, Seungwon Seong, Hyejeong Im, Sung Gap Moon, Hanul Yoo, Seunghyup eng Research Support, Non-U.S. Gov’t England 2017/09/30 Nat Commun. 2017 Sep 28;8(1):725. doi: 10.1038/s41467-017-00805-z.

   Abs

   With the emergence of wearable or disposable electronics, there grows a demand for a flash memory realizable on various flexible substrates. Nevertheless, it has been challenging to develop a flash memory that simultaneously exhibits a significant level of flexibility and performance. This is mainly due to the scarcity of flexible dielectric materials with insulating properties sufficient for a flash memory, which involves dual dielectric layers, respectively, responsible for tunneling and blocking of charges. Here we report ultra-flexible organic flash memories based on polymer dielectrics prepared by initiated chemical vapor deposition. Using their near-ideal dielectric characteristics, we demonstrate flash memories bendable down to a radius of 300 mum that exhibits a relatively long-projected retention with a programming voltage on par with the present industrial standards. The proposed memory technology is then applied to non-conventional substrates, such as papers, to demonstrate its feasibility in a wide range of applications.Flexible flash memory is crucial to modern electronics, but its fabrication is challenging in the absence of suitable dielectric materials. Here, Lee et al. realize organic memory with retention over 10 years using tunneling and blocking dielectric layers prepared by initiated chemical vapor deposition.

5. Flexible, Low-Power Thin-Film Transistors Made of Vapor-Phase Synthesized High-k, Ultrathin Polymer Gate Dielectrics

   J. Choi, M. Joo, H. Seong, and 4 more authors

   2017

   Choi, Junhwan Joo, Munkyu Seong, Hyejeong Pak, Kwanyong Park, Hongkeun Park, Chan Woo Im, Sung Gap eng 2017/06/02 ACS Appl Mater Interfaces. 2017 Jun 21;9(24):20808-20817. doi: 10.1021/acsami.7b03537. Epub 2017 Jun 12.

   Abs

   A series of high-k, ultrathin copolymer gate dielectrics were synthesized from 2-cyanoethyl acrylate (CEA) and di(ethylene glycol) divinyl ether (DEGDVE) monomers by a free radical polymerization via a one-step, vapor-phase, initiated chemical vapor deposition (iCVD) method. The chemical composition of the copolymers was systematically optimized by tuning the input ratio of the vaporized CEA and DEGDVE monomers to achieve a high dielectric constant (k) as well as excellent dielectric strength. Interestingly, DEGDVE was nonhomopolymerizable but it was able to form a copolymer with other kinds of monomers. Utilizing this interesting property of the DEGDVE cross-linker, the dielectric constant of the copolymer film could be maximized with minimum incorporation of the cross-linker moiety. To our knowledge, this is the first report on the synthesis of a cyanide-containing polymer in the vapor phase, where a high-purity polymer film with a maximized dielectric constant was achieved. The dielectric film with the optimized composition showed a dielectric constant greater than 6 and extremely low leakage current densities (<3 x 10(-8) A/cm(2) in the range of +/-2 MV/cm), with a thickness of only 20 nm, which is an outstanding thickness for down-scalable cyanide polymer dielectrics. With this high-k dielectric layer, organic thin-film transistors (OTFTs) and oxide TFTs were fabricated, which showed hysteresis-free transfer characteristics with an operating voltage of less than 3 V. Furthermore, the flexible OTFTs retained their low gate leakage current and ideal TFT characteristics even under 2% applied tensile strain, which makes them some of the most flexible OTFTs reported to date. We believe that these ultrathin, high-k organic dielectric films with excellent mechanical flexibility will play a crucial role in future soft electronics.

2016

1. Foldable and Disposable Memory on Paper

   B. H. Lee, D. I. Lee, H. Bae, and 7 more authors

   2016

   Lee, Byung-Hyun Lee, Dong-Il Bae, Hagyoul Seong, Hyejeong Jeon, Seung-Bae Seol, Myung-Lok Han, Jin-Woo Meyyappan, M Im, Sung-Gap Choi, Yang-Kyu eng Research Support, Non-U.S. Gov’t England 2016/12/07 Sci Rep. 2016 Dec 6;6:38389. doi: 10.1038/srep38389.

   Abs

   Foldable organic memory on cellulose nanofibril paper with bendable and rollable characteristics is demonstrated by employing initiated chemical vapor deposition (iCVD) for polymerization of the resistive switching layer and inkjet printing of the electrode, where iCVD based on all-dry and room temperature process is very suitable for paper electronics. This memory exhibits a low operation voltage of 1.5 V enabling battery operation compared to previous reports and wide memory window. The memory performance is maintained after folding tests, showing high endurance. Furthermore, the quick and complete disposable nature demonstrated here is attractive for security applications. This work provides an effective platform for green, foldable and disposable electronics based on low cost and versatile materials.

2. A Low-Voltage Organic Complementary Inverter with High Operation Stability and Flexibility Using an Ultrathin iCVD Polymer Dielectric and a Hybrid Encapsulation Layer

   Hyejeong Seong, Junhwan Choi, Byung Chul Jang, and 4 more authors

   2016
3. Flexible Nonvolatile Polymer Memory Array on Plastic Substrate via Initiated Chemical Vapor Deposition

   B. C. Jang, H. Seong, S. K. Kim, and 6 more authors

   2016

   Jang, Byung Chul Seong, Hyejeong Kim, Sung Kyu Kim, Jong Yun Koo, Beom Jun Choi, Junhwan Yang, Sang Yoon Im, Sung Gap Choi, Sung-Yool eng Research Support, Non-U.S. Gov’t 2016/05/05 ACS Appl Mater Interfaces. 2016 May 25;8(20):12951-8. doi: 10.1021/acsami.6b01937. Epub 2016 May 11.

   Abs

   Resistive random access memory based on polymer thin films has been developed as a promising flexible nonvolatile memory for flexible electronic systems. Memory plays an important role in all modern electronic systems for data storage, processing, and communication; thus, the development of flexible memory is essential for the realization of flexible electronics. However, the existing solution-processed, polymer-based RRAMs have exhibited serious drawbacks in terms of the uniformity, electrical stability, and long-term stability of the polymer thin films. Here, we present poly(1,3,5-trimethyl-1,3,5-trivinyl cyclotrisiloxane) (pV3D3)-based RRAM arrays fabricated via the solvent-free technique called initiated chemical vapor deposition (iCVD) process for flexible memory application. Because of the outstanding chemical stability of pV3D3 films, the pV3D3-RRAM arrays can be fabricated by a conventional photolithography process. The pV3D3-RRAM on flexible substrates showed unipolar resistive switching memory with an on/off ratio of over 10(7), stable retention time for 10(5) s, excellent cycling endurance over 10(5) cycles, and robust immunity to mechanical stress. In addition, pV3D3-RRAMs showed good uniformity in terms of device-to-device distribution. The pV3D3-RRAM will pave the way for development of next-generation flexible nonvolatile memory devices.

4. Synthesis of Ultrathin, Homogeneous Copolymer Dielectrics to Control the Threshold Voltage of Organic Thin-Film Transistors

   Kwanyong Pak, Hyejeong Seong, Junhwan Choi, and 2 more authors

   2016
5. Tuning the electrode work function via a vapor-phase deposited ultrathin polymer film

   Jieung Baek, Junseok Lee, Munkyu Joo, and 8 more authors

   2016
6. Vapor-phase deposition of the fluorinated copolymer gate insulator for the p-type organic thin-film transistor

   Junhwan Choi, Hyejeong Seong, Kwanyong Pak, and 1 more author

   2016
7. Efficient organic photomemory with photography-ready programming speed

   M. Kim, H. Seong, S. Lee, and 4 more authors

   2016

   Kim, Mincheol Seong, Hyejeong Lee, Seungwon Kwon, Hyukyun Im, Sung Gap Moon, Hanul Yoo, Seunghyup eng Research Support, Non-U.S. Gov’t England 2016/07/28 Sci Rep. 2016 Jul 26;6:30536. doi: 10.1038/srep30536.

   Abs

   We propose a device architecture for a transistor-type organic photomemory that can be programmed fast enough for use in electrical photography. Following the strategies used in a flash memory where an isolated charge storage node or floating gate is employed, the proposed organic photomemory adopts an isolated photo-absorption zone that is embedded between upper and lower insulator layers without directly interfacing with a semiconductor channel layer. This isolated photo-absorption zone then allows the device to operate in electrically ’on’ state, in which the high electric-field region can have a maximal spatial overlap with the illuminated area for efficient and facile light-programming. With the proposed approach, a significant threshold voltage shift is attained even with the exposure time as short as 5 ms. High quality dielectric layers prepared by initiated chemical vapor deposition ensure erasing to occur only with electrical signal in a controlled manner. Retention time up to 700 s is demonstrated.

8. Vapor-Phase Deposited Ultrathin Polymer Gate Dielectrics for High-Performance Organic Thin Film Transistors

   Hyejeong Seong, Kwanyong Pak, Munkyu Joo, and 2 more authors

   2016

2015

1. Ultra-low power, highly uniform polymer memory by inserted multilayer graphene electrode

   Byung Chul Jang, Hyejeong Seong, Jong Yun Kim, and 5 more authors

   2015
2. A Surface Tailoring Method of Ultrathin Polymer Gate Dielectrics for Organic Transistors: Improved Device Performance and the Thermal Stability Thereof

   Hyejeong Seong, Jieung Baek, Kwanyong Pak, and 1 more author

   2015

2014

2013

2012

2011